EEPROM memory cells are normally used to store a single digital bit per memory cell. However, memories that store more than one bit per memory cell have been described. Such memories are often called "multilevel" memories. Multilevel memories have the potential for significantly reducing the cost per bit of storage.
An EEPROM memory cell may be viewed as a field effect transistor with a gate that is isolated. During programming, charge is transferred to the gate by a tunneling process. The amount of charge stored on the gate determines the conductivity of the source-drain path. To store N bits per memory cell, each memory cell must provide 2.sup.N discrete distinguishable states corresponding to 2.sup.N different charge levels. The maximum number of bits that can be stored depends on the sensitivity of the circuits used to measure the conductivity and on the ability of the write circuits to precisely control the amount of charge that is transferred to the floating gate during the programming process. While sense circuits having the required precision to store and distinguish 256 are known, the precise programming of the charge still presents problems.
Charge is transferred to the floating gate by causing electrons to tunnel through the oxide that insulates the gate. In EEPROM cells, the tunneling is driven by the application of a voltage between the floating gate and a portion of the channel region of the transistor that includes a tunneling window. During the programming operation, the effective potential on the floating gate is the sum of the potentials created by the charge that has been placed on the gate and the applied electric field that drives the tunneling. Hence, the conductivity of the channel that is measured during the programming will be different from that measured after the tunneling field has been turned off at the end of the programming. Accordingly, the amount of charge on the floating gate at any point in the programming process cannot be accurately determined by measuring the conductivity of the channel during the programming process. Furthermore, the memory cell to memory cell variations do not permit programming based on predetermined programming time for each possible charge level. This situation is further complicated by the fact that the charge transfer rate depends on the amount of charge already on the floating gate.
Hence, to obtain the programming precision required for multilevel cells, iterative programming algorithms are used. These algorithms apply the tunneling field for some period of time. The tunneling field is then turned off and the amount of charge that was stored measured. The process is repeated until the desired charge level has been provided.
Such iterative programming techniques suffer from two problems. First, the time needed to write a memory cell can be quite long. It should be noted that the memory cell must be allowed to settle before the charge can be measured. Second, the accuracy with which the cell can be programmed is limited by the size of the increments in the charge used in each iteration. The programming error will be typically one half the increment of charge transferred in the final step of the iteration. Hence, if small increments are used to provide precision, a very large number of iterations will be needed leading to unacceptable write times. If large increments are used, the precision will be too low to provide a high number of bits per cell. These problems rapidly increase in severity as the number of bits per to be stored in each cell increases.
A second problem that limits the number of bits that can be stored per memory cell arises from the finite rate at which charge leaks off of the floating gate. This leakage problem is not critical in memory cells that store one bit per memory cell since roughly half of the charge would need to leak off the floating gate before an error occurs. Accordingly, one bit memory cells have retention times measured in years. In memory cells that store N bits, an error will occur when the amount of charge that leaks off reaches 2.sup.-(N+1). Hence, if a one bit cell has a retention time of 10 years, a 4 bit cell will have a retention time of less than 8 months, and an 8 bit cell will have a retention time of less than 2 weeks.
Broadly, it is the object of the present invention to provide an improved multilevel EEPROM memory cell and memory employing the same.
It is a further object of the present invention to provide an improved multilevel EEPROM memory cell whose state can be measured while the tunneling field is being applied.
It is a still further object of the present invention to provide a multilevel memory with improved retention time.
These and other objects of the present invention will become apparent to those skilled in the art from the following detailed description of the invention and the accompanying drawings.